With the CHIPS and Science Act set to channel billions of dollars into U.S. semiconductor R&D and manufacturing, chip companies and other stakeholders are weighing in on how to best structure the new programs.
Sens. Maria Cantwell (D-WA) and Patty Murray (D-WA) visited a semiconductor manufacturing facility in Washington state on Aug. 17. (Image credit – Senate Commerce Committee)
The newly signed CHIPS and Science Act represents a much-anticipated boon for the U.S. semiconductor industry, providing $52 billion to implement the CHIPS for America Act, which Congress enacted on the first day of 2021. While the earlier act established a series of initiatives to support R&D and subsidize manufacturing, until now agencies have not had the funding to take more than preliminary steps.
Of the new law’s total appropriation, $39 billion is allocated over five years to encourage semiconductor manufacturers to finance U.S.-based fabrication equipment and facilities, or “fabs.” It also supplements that money with a tax credit that was not included in the original CHIPS law. In addition, it allocates $11 billion to the Department of Commerce for a set of new R&D programs, and $2 billion to the Department of Defense to create a National Network for Microelectronics R&D.
Federal agencies are now deliberating over how to implement the initiatives, and companies and state officials are already jockeying to win shares of the funds. Stakeholders are also considering what follow-on steps are necessary to ensure the law achieves its aims, with workforce issues, particularly immigration reform, emerging as a focus for intense advocacy.
Concerns have been mounting in recent years about the concentration of semiconductor manufacturing in Asia, especially Taiwan. Enticed by promises of support from federal and local governments, over the past two years several companies announced plans for new fabs in existing chip-manufacturing centers such as Arizona and Texas, and in new regions, including a major complex Intel intends to build near Columbus, Ohio.
Cutting-edge fabs are extremely expensive, requiring highly advanced manufacturing equipment and a specialized workforce. Policymakers hope the act’s financial incentives will compete with those offered by other nations and encourage companies to further scale up their U.S. investments.
Intel’s initial commitment in Ohio was for $20 billion, but the company has said the CHIPS Act incentives could enable it to expand its investment there to $100 billion. In conjunction with the signing of the CHIPS Act this month, Micron announced it will spend $40 billion through 2030 on manufacturing facilities in the U.S. as part of its plans to invest $150 billion globally, and GlobalFoundries announced it will expand a plant in New York. Among prospective investments that may also be spurred by the act, Samsung has recently floated plans to build plants in Texas projected to cost almost $200 billion.
These companies will be able to use the new tax credit created by the act to reimburse 25% of qualified investments in facilities that start construction by the beginning of 2027. The Congressional Budget Office estimates the new credit will cost the Treasury about $24 billion through 2031.
Companies will have to compete for the act’s subsidies, and the Commerce Department is currently working with the National Institute of Standards and Technology to fill in the details on that program.
The act does outline eligible uses of the funds, which broadly include financing of U.S.-based facilities and equipment for “semiconductor fabrication, assembly, testing, advanced packaging, or research and development.” The funds can specifically be used to pay for “construction, expansion, or modernization” of such facilities and equipment, associated workforce development efforts, and certain operations costs, including “specialized workforce, essential materials, and complex equipment maintenance.” The Commerce Department can also use a portion of the funds for loans and loan guarantees.
The subsidies come with some constraints, including a requirement that companies cannot claim them if they expand their advanced manufacturing activities in “countries of concern,” notably China. While China is arguing the provision is an unfair trade practice that aims to suppress its own efforts to develop its semiconductor sector, the restriction builds on other recent U.S. efforts such as export controls to prevent rival nations from exploiting U.S.-funded technology.
In line with such aims, the CHIPS and Science Act is also providing $500 million over five years to the State Department to support “development and adoption of secure and trusted telecommunications technologies, secure semiconductors, secure semiconductors supply chains, and other emerging technologies.”
Sen. John Cornyn (R-TX) and Rep. Michael McCaul (R-TX) met with representatives from the semiconductor industry and the University of Texas at an event in April to discuss a proposal to create a Texas Institute of Electronics. (Image credit – Office of Sen. Cornyn)
Much remains to be decided about how the act’s R&D initiatives will be structured.
The National Semiconductor Technology Center (NSTC) the Commerce Department is tasked with launching will be a public-private consortium that will conduct research and prototyping of advanced semiconductor technology, support workforce-training programs, and maintain an investment fund to help startup companies commercialize new technologies. NIST is also directed to establish a National Advanced Packaging Manufacturing Program (NAPMP) for developing new ways of encasing semiconductors within integrated circuits, to expand in-house R&D relevant to microelectronics, and to establish up to three Manufacturing USA institutes dedicated to microelectronics.
For fiscal year 2022, the act allocates $2 billion for NSTC, $2.5 billion for NAPMP, and $500 million for the remaining activities. These programs will receive an additional $6 billion total in the subsequent four years, and the Commerce Department is granted discretion on how to split that money between them with no time limit on when it must be spent.
Lead sponsors of the CHIPS Act have been mobilizing coalitions to convince the department to locate the NSTC and NAPMP in their states. As early as last summer, Senate Majority Leader Chuck Schumer (D-NY) was pitching the Albany NanoTech Complex to Commerce Secretary Gina Raimondo, observing he had the region “front of mind” as he shepherded the funding through the Senate. Likewise, Sens. John Cornyn (R-TX) and Mark Warner (D-VA), key architects of both CHIPS acts, have led their states’ congressional delegations in urging Raimondo to consider establishing the programs in Texas and Virginia, respectively.
However, the R&D activities will not necessarily be concentrated in a single location, and stakeholders have offered various visions for the NSTC and other CHIPS Act programs. Earlier this year, the Commerce Department received over 200 responses to a request for input on how to implement the new provisions. Among the respondents is the American Semiconductor Innovation Coalition, a group of more than 50 companies, universities, and national laboratories that recommends the NSTC and NAPMP be driven by an industry-led network of “hubs and geographically distributed centers of excellence.”
The President’s Council of Advisors on Science and Technology also plans to weigh in on the act’s implementation in a forthcoming report led by council members Lisa Su, who is the CEO of Advanced Micro Devices, and Bill Dally, the chief scientist at NVIDIA. Discussing their vision for the NSTC and NAPMP at a recent meeting, Su remarked, “The definition of semiconductors is actually much broader than just people who make chips, but includes system companies as well as equipment companies, as well as the entire academic infrastructure. So we’re recommending a broad approach, which would include a number of regional centers across the country that come together.”
That echoes sentiments expressed by Intel CEO Pat Gelsinger at a public meeting PCAST held in May to explore strategies for implementing the CHIPS Act.
Gelsinger estimated there is “probably 80% agreement on the outlines for the NSTC,” but anticipated there will be “some vicious arguments on some fine points of governance structure.” He recommended that it take the form of a “set of nationwide hubs that are placed with U.S. companies and other facilities that leverage existing infrastructures,” noting that Intel has offered to host a hub focused on advanced lithography and potentially a second on advanced packaging technology.
Attesting to NSTC’s importance, Gelsinger observed that maintaining manufacturing capacity in the semiconductor sector is directly tied to ongoing R&D, including at universities and startup companies. “When every new fab module is $10 billion and has to be backed up by many billions of dollars of R&D, that is a yearly investment,” he remarked. “On many of the more advanced technology requirements, research efforts, that’s where I see things like NSTC being so powerful, [to] keep that R&D engine, the talent engine, the startup engine alive.”
Semiconductor Industry Association CEO John Neuffer also weighed in on the NSTC and NAPMP at the meeting, arguing they should be industry-led, leverage existing industrial facilities, and focus on prototyping and piloting activities. He further argued the two programs should leverage existing industrial facilities and be “combined entirely” if possible and cautioned against a decentralized approach, saying that “too much diffusion of resources risks leaving us with an anemic, meandering result.”
PCAST previewed its report in a letter to President Biden the day he signed the CHIPS and Science Act, stating it would be delivered within weeks. The letter notes it will suggest actions to promote workforce development and technology commercialization, such as developing shared resources for startups and academic researchers to test new technologies, reducing their development costs. It will also recommend the U.S. pursue “grand challenges” for semiconductor R&D such as construction of the first “zettascale” supercomputer, which would be about 1,000 times faster than the exascale supercomputers the U.S. is just now deploying.
The DOD-funded National Network for Microelectronics R&D the CHIPS Act created is tasked with transitioning R&D innovations into workable technologies. Among its other goals, it is directed to “enable cost-effective exploration of new materials, devices, and architectures, and prototyping in domestic facilities to safeguard domestic intellectual property.”
Former Defense Advanced Research Projects Agency Director Victoria Coleman has been a champion of the network concept, referring to it as a “microelectronics commons.” Explaining its motivation in an interview this year, Coleman, now the Air Force’s chief scientist, said, “The context was an understanding from really top-tier academics that investments that we were making in early-stage microelectronics research could not be proven in the facilities that we have here at home. We had to go instead off to overseas places, in particular [Asia], to do the work that is necessary to prove out the innovation.”
How the DOD network will be structured and relate to the NSTC also remains to be seen. In its annual defense policy legislation last year, Congress directed that it be led by at least two entities that together “represent the geographic diversity of the United States.” Lawmakers also expressed concern that DOD was unprepared to create the network and that there was still “confusion” among federal agencies about their respective roles in implementing CHIPS initiatives.
Semiconductor manufacturers have increasingly raised alarms about workforce shortages, which are likely to be exacerbated as companies create thousands of jobs in response to the influx of CHIPS funding.
To help address the issue, the CHIPS and Science Act provides $200 million over five years to the National Science Foundation for workforce development activities, including creation of a National Network for Microelectronics Education. The network will support curriculum development, shared training infrastructure, public outreach, and regional partnerships between associate- and bachelor-degree institutions, labor groups, and industry.
Industry players are calling for stronger action. For example, the trade association SEMI and the American Semiconductor Academy have just released a report calling for the federal government to provide more than $2 billion over five years for workforce development activities, including $500 million for the national education network. It notes a 2017 survey found that 82% of semiconductor companies reported difficulties finding qualified candidates, and it states that workforce needs could more than double over the next few years because of the CHIPS Act.
The industry is also pushing for immigration reforms, particularly measures that would draw more workers with advanced degrees in STEM fields to the U.S. While many roles at chip fabs can be filled by technicians with two-year degrees from programs that can be set up at U.S. colleges, the field will also require a large number of employees with graduate-level training that can be less rapidly scaled up.
The National Science Board reports that almost half of doctorate-level workers in science and engineering jobs in the U.S. are foreign-born, but international students often face challenges securing visas to work in the U.S. after graduation.
In July, a group of nine human resources executives at semiconductor companies sent a letter to Congress urging it to “enact much-needed green card reforms this year, as part of any must-pass legislation.” They endorsed a provision proposed by House Democrats that would have exempted certain advanced degree graduates from the caps placed on green card supply. Negotiators removed that provision from the final CHIPS Act because it lacked sufficient support in the Senate. The lead Republican for immigration policy, Sen. Chuck Grassley (R-IA), has insisted any such changes must be implemented through a broad immigration policy bill.
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